5th Internal Conference on Computer Architecture (ICCA'04)

 Dep. Informática, Univ. Minho
Campus Gualtar, Braga, PORTUGAL

 Editor: Alberto José Proença (Editor's Message)
Conference Proceedings

***** Conference Talks ******
22-Jan-04

9h00 Session 1
Science in Computer Architecture 

10h40 Session 2
Evolution of General Purpose CPUs

14:10 Session 3
Pre-University Education in Computer Architecture

14:50 Session 4
Performance Evaluation Techniques

*****Workshops ******
22-Jan-04
Performance Evaluation and Optimization: Case Studies

Instructions for authors

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Tutorials

09-Jan-04

09h00m  Pipelining and Superscalarity in Current CPUs (sorry, no tutorial; replaced by a lecture revisiting the subject)
              Joaquim Jorge Machado
Abstract. (...)
 

16-Jan-04

09h00m  A Cache Hierarchy in a Computer System  (notes, slides)
              Paulo Jorge Domingues (15)
Abstract. In the past two decades, the steady increase on processor performance was not followed by a similar improvement on memory technology. This lead computer designers to build a memory hierarchy where the top level is built up of very fast but also very small memory devices and the bottom level by slower and larger memories. This overview focuses the top levels, the cache memory, and the way they largely improve system performance without significantly increase its cost: what are the constrains on cache size, the advantages and disadvantages of using several levels of cache opposed to just one, the mapping and writing policies, the differences between some cache organizations; which techniques can be used to improve miss rate, miss penalty and hit time.
                Suggestion for additional reading:
                Memory Hierarchy slides, lectured at the Advanced Computer Architecture course, in University of Maryland, Baltimore County, USA (1999)

23-Jan-04

09h00m  Current Architecture for Parallel Systems  (notes, slides)
              António Lira Fernandes (15)
Abstract. The purpose of this tutorial is to provide the basic concepts related to parallel processing. We will first discuss the fundamentals of parallel machine architectures and parallel programming, including a short view of Flynn's taxonomy with some implementation examples. An overview of some programming techniques supported in parallel environments follows, namely MPI-2 and OpenMP. Finally, a presentation of the top fastest computer systems worldwide based on the TOP500 closes this tutorial.
                Suggestion for additional reading:
                A tutorial on fundamentals on parallel machines and programming, included in a SIGGRAPH'2000 course oriented to computer graphics, given by Dirk Bartz and Bengt-Olaf Schneider can be obtained from here.

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Conference Talks

22-Jan-04

Session 1
Science in Computer Architecture

Chairman: António Manuel Pina

09h00m  Welcome Session
              Alberto José Proença

09h20m  A Coalgebraic Approach to the Y86 Processor Architecture (paper, annex, slides)
             Nuno Miguel Rodrigues (17)
Abstract. This communication reports an attempt to use a mathematical approach to model a simplified version of an X86 processor, the Y86 processor. The main mathematic structures used in this formalization are Algebras, Coalgebras and Functors. To construct the Y86 processor model, some examples are presented using both Functorial definitions and Haskell animations.


09h40m  Speculative Precomputation (paper, slides)
             Carlos Augusto Cunha (19)
Abstract. Current processors are based on a multithreaded architecture. Simultaneous Multithreading (SMT) techniques are used to increase instruction throughput under a multiprogramming workload; however, it does not improve performance when only a single thread is executing. This communication explores Speculative Precomputation, a technique that uses idle thread contexts in a multithreaded architecture to improve the performance of single-threaded applications. It reduces program stalls, generated by data cache misses, using available thread contexts to prefetch these data. Speculative Precomputation tasks are described, and the examination of basic triggers and chaining triggers are made, using a Intel Itanium ISA processor as the evaluation base.
 

10h00m Common Language Runtime: a New Virtual Machine (paper, slides)
             João Augusto Martins Ferreira (16)
Abstract. Virtual Machines provide a runtime execution platform combining bytecode portability with a performance close to native code. An overview of current approaches precedes an insight into Microsoft CLR (Common Language Runtime), comparing it to Sun JVM (Java Virtual Machine) and to a native execution environment (IA-32). A reference is also made to CLR in a Unix platform and to techniques on how CLR improves code execution.
 

10h20m  Coffee break

 

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Session 2
Evolution of General Purpose CPUs

Chairman: João Luís Sobral

10h40m  Extensions to Instruction Sets (paper, slides)
             Ricardo Luís (13)
Abstract. This communication analyses extensions to instruction sets in general purpose processors, together with their evolution and significant innovation. It begins with an overview of specific multimedia and digital signal processing requirements and then it focuses on feature detection to properly identify the adequate extension. A brief performance evaluation on two competitive processors closes the communication.
 

11h00m  Power Aware Techniques: Extensions to ISAs (paper, slides)
             Eva Oliveira (14)
Abstract. Mobile computing is heavily dependent on battery life. Although circuit designs already take advantage of microelectronics and microarchitecture-level optimization techniques, device longevity can be further extended through energy aware compilation techniques. This communication gives an overview of software-based power aware techniques, namely re-starters to make temporary processor state visible to software without clogging hardware exception management, exposed bypass latches to manage register file traffic and tag-unchecked loads and stores to improve cache access.
 

11h20m  A new Processor for Power Efficient Computing (paper, slides)
             José Augusto Silva (11)
Abstract. Mobile computing became a common gadget in spite of the limitation with power, weight and performance. Industries attempted to overcome these limitations and their research lead to power efficient computing. The new processor from Transmeta, Efficeon, works with lower clock frequencies and voltage, offers better performance per clock cycle than previous Crusoe processor, and is highly competitive with Centrino.
 

11h40m  Hardware Requirements for Cellular Processors (paper, slides)
             Eduardo Valente (14)
Abstract. Handheld devices require constant adjustments to comply with newer wireless standards and services. Any physical change is a challenge in cost and deadlines. This communication identifies a common architecture backbone for mobile phones and traces a scenario of the hardware requirements for the latest wireless technologies and standards. The architecture of the Intel PXA800F cellular processor is detailed as a case study.
 

12h00m  The CPU IA-64: Key Features to Improve Performance (paper, slides)
             Ricardo Freitas (14)
Abstract. The IA-64 architecture is significantly different from previous IA-32, and it offers to the operating system and applications a set of features that can improve efficiency in code execution by reducing memory accesses. A quick overview on some IA-64 new features is presented, with a focus on the registers set and on the register stack engine, which are the main features that mostly reduce the memory accesses.
 

12h20m  Lunch

 

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Session 3
Pre-University Education in Computer Architecture

Chairman: João Miguel Fernandes

14h10m  A High School Curriculum on Computer Systems Organization (draft paper ; sorry, no communication)
             João Pedro Martiniano (Des)
Abstract. As the role of computers and related technologies continues to grow in our societies, the mere study of computer applications in high school is perceived as being insufficient. This communication discusses a one year course curriculum on computer systems organization, designed for the 11th or 12th grades. While not profound in depth, it has a relative broad scope, aiming to provide students with a scientific-oriented view of the field, while it also tries to identify future developments.
 

14h30m  A Curriculum for the Professional Branch in High School (paper, slides)
             Paulo Leão (12)
Abstract. Course curricula for the Professional Branch in High Schools have not been updated since its beginning in 1989, except for minor changes. A proposal for a renewed Computer System Architecture curriculum is presented and discussed, based on other countries' experiences. A more incremental level of teaching is stressed through the use of low-level language simulators, replacing real CPU assembly language: students benefit from a step-by-step learning progress, without the burden of too many details, but providing a full understanding of the basic principles. The use of a simulator also gives more flexibility to schools that have limited resources.
 

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Session 4
Performance Evaluation Techniques

Chairman: António Joaquim Esteves

14h50m  Characterization of Workload Suites for Performance Evaluation (paper, slides)
             Carlos Manuel Jardim (146
Abstract. The main goal of this communication is to present "what to measure" and "how to measure" to evaluate the system performance: its characteristics and the impact of the execution environment. Measurements are of fundamental importance for performance evaluation since they provide a “picture” of the behaviour of the system and of their load. Experimental approaches to workload characterization are based on the application of techniques for the interpretation and the analysis of measurements. A survey of methodologies is presented to model workloads in distributed and parallel systems.
 

15h10m  Benchmark Suites to Measure Computer Performance (paper, slides)
             Hernâni da Silva Costa Correia (17)
  Abstract. The purpose of this work is to show one particular technique to measure and compare the performance of computers – benchmarking. First an overview is given of what is relevant in a bench rehearsal, and then some of the main benchmarking techniques are presented. A reference is made to the work carried out by the main international benchmarking organisms, focusing on the SPEC consortium and its CPU2000 benchmark suite.
 

15h30m   Coffee break

 

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Workshops

Performance Evaluation and Optimization: case studies

22-Jan-04

Chairman: Luís Paulo Santos

15h50m  Optimizing CPU Performance: Image Creation in Computer Graphics (paper, annexes, slides)
             Carlos Ferreira Silva & Manuel Machado Carvalho (16)
Abstract. This work aimed to explore techniques to reduce the execution time of the creation of an image in a single-processor computer, using ray tracing software (PIRT 1.0). Applying a profiler to the source code (in C), the main bottlenecks were identified, machine-independent optimization techniques were applied to the longer functions – namely function inline and assembly inline – and the obtained results were analysed.

16h10m  Cache Impact on Image Processing Performance (paper, annexes, slides)
             Tiago Chaves Bezerra (16)
 Abstract. This communication analyses a non-linear relationship between the processing time and the size of an image. Research methodologies were applied to explain this behaviour, such as verifying the “memory mountain”, debugging the code and using a cache profiling tool. The main cause of this non-linear behaviour is shown to be the merge of the cache size, their associate degree and the image location address.

16h25m  Optimization of Java Graphical Applications in PDAs (paper, annexes, slides)  
             Nuno Faria (15)
Abstract.  This work aims to show the performance evolution of a JAVA graphical application (a SVG file viewer). The critical parts of the application, mainly at the processor level, are analysed, through the use of a JAVA profiler. The impact of different optimization techniques on the application performance is shown. A performance comparison between the application of the most effective techniques and the initial code is presented.
 

16h40m   Demonstration of running projects

17h30m   Closing Session

 

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Editor's Message

Once again I have to write these lines under the usual stress: in less than 30h the opening session of ICCA'04 will take place, and 30 full bound copies of the proceedings should lie on the conference reception for the participants...
But, once again, I think the effort was worthy! People do learn when they play. And this is a play, and the amphitheatre will be the playground tomorrow. For the 5th time MSc students will have a chance to test their communication skills under an awkward topic in computing: Computer Architecture.
Some may have enough background to feel comfortable when computer engineering jargon is used in the classroom; others feel scared, since it is the first time they meet an academic that places questions on (ir)relevant matters, such as "how does the computer really work?". And to overcome this wide range of backgrounds and motivate all students to engage in creative and self-learning activities, we play with words – "Internal" is very close to "International"… - and we all try to make the ICCA an event worthy of being misled as an International event…
The ICCA approach attempts to complement the traditional set of academic lectures - which gives an updated overview of the more relevant topics in CA - with the individual commitment of each student to further explore a particular interest area in CA. 
This year the whole concept went a step ahead: why a Conference with only Talks? Why not add some Tutorials (longer exposure to a particular topic) and Workshops (some hands-on)? Time will say if it will be repeated next year.
Come and enjoy your stay with us! The whole content of ICCA’04 is available online in http://gec.di.uminho.pt /micei/ac0304/icca04/. 
My sincere congratulations and many thanks to all who contributed once more to make this event a successful one, namely all the MSc students and my colleagues who played the role of external referees and session chairmen (António Joaquim Esteves, António Manuel Pina, João Luís Sobral, João Miguel Fernandes e Luís Paulo Santos).
 

Braga, 21-Jan-04

Alberto José Proença

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Conference Proceedings

The printed version of the whole set of communications, bound as a Conference Proceedings book, is a gift to all participants in this event, distributed at the beginning of the conference talks. However, if anyone wishes an extra copy, is free to download and printout the communications (referenced above), plus an Acrobat file containing the front cover, the table of contents and the session separators. After the physical event, a copy of the slides that were presented - in the tutorials, talks and workshop demonstrations - will be placed in this site, next to the papers' links (above).

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